Knowledge of NAND flash

Source: 　　Editor: Sharpay Update Time :2018-12-19

In the semiconductor industry, there are many assumptions, terms, and misunderstandings associated with interface standards, performance specifications, functional characteristics, and authenticity of design. Therefore, it is important to ascertain the facts. This article will clarify the misconceptions about NAND flash memory.

It has a constant performance over the lifetime.

The more data is programed into a SSD, especially random data, the more work needs to be done behind the controller. The amount of intelligence and actual read or program processing can create a new board for controllers that apply to interleaving background management. The cheap controllers with fewer resources for internal memory or hardware accelerators may perform poorly, either resulting in a shortened system life or a significant decrease in performance.

With the increase of PCIe sales, SATA gradually disappeared.

Although PCIe dominates many consumer markets, such as games and notebooks, the increase and harshness of industrial data storage has given SATA interfaces a solid foothold in the industrial market. With the increasing demand for SSD storage, SATA SSDs are still in high demand and will meet the markets that don’t require PCIe performance or limited power allocation. The new SATA flash controller can be used with the latest 3D flash memory to provide a price-competitive solution for applications that are not fully performance-driven.

The function of the average erasing storage block technology is also implemented.

The average erasing storage block technology is a huge topic and can also be a very basic consumer application. Or it can be very complicated when a terminal application requires long life and reliability. It is important to dig deep into the functionality of the average erasing storage block technology with flash controller vendors to understand the system's robustness. In short, if your information is critical or valuable, it is best to delve into the controller designed to meet the most demanding requirements.

Managed NAND can only be used as eMMC or UFS

Managed NAND refers to the system including the NAND flash memory management function and NAND flash memory itself in the same chip and it has different selection and quality levels. Some managed NANDs are almost like the original NANDs, but have the ECC debug mechanism function. However, the flash management will have to be executed by an external processor. The widely circulated and higher level implementation is eMMC or UFS, but only some host systems are limited. High-order custom managed NAND solutions can be easily built and can be used with any familiar host interface. On-board electronic disk solutions are indeed possible and offer significantly lower TCO.

LDPC is the most powerful ECC debugging mechanism

LDPC has become a special term associated with the highest quality ECC debugging mechanism. However, there are many types of LDPC execution, and the solutions are not exactly the same. Some are optimized for calibrate quality, some for speed, some for power, and some for cost. In short, do not mistakenly think that LDPC is the best and only solution, it mainly depends on the actual implementation of the LDPC.

If you want to design a custom solution, you need to integrate the source code into the firmware.

Storage solutions are not just basic storage systems. There can be more possibilities through the modern application development interface (API). In addition, the end customers do not need to disclose any information to the Flash controller vendor to fully control their intellectual property firmware, and controls their USP. It is feasible for flash controller to have API development kit.